搜索资源列表
lab8
- my labs on verilog. this is modeling of proccesor core
IIC
- 用标准Verilog HDL 语言编写的IIC总线IP核，详细定义了时序及输入输出， 可以直接应用-Standard Verilog HDL language of the IIC bus IP core, a detailed definition of the timing and the input and output, can be applied directly
Floating-Point-Adder
- 浮点数加法器IP核的vhd设计。浮点数加法运算是运输中使用最高的运算，结合vhdl和EPGA可编程技术，完成具有5线级流水线结构、符合IEEE 754浮点标准、可参数化为单、双精度的浮点数加法器。-Floating point adder design IP core vhd. Floating-point addition operation is used in most transport operations, combined with vhdl and EPGA programmab
Cordic
- cordic算法ip核,国外网站搞到的,可以应用于电机控制，快速数值计算，基于FPGA硬件实现-cordic ip core,just enjoy
FPGA_FFT
- 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
grlib-tmtc-1.0.18.tar
- Zipped LEON3 processor VHDL core.
rax2
- rax2 fft implation the fft in verilog instance and in ise of xilinx it show how to istance fft core and the port used
pipelined_fft_64
- 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
8051vlog
- 8051IP核，verilog源代码，包含测试向量，-8051 IP Core verilog code， with testbench
CoreCFI
- VERILOG编写的CoreCFI实验例程，包括整个工程，可以直接使用-Prepared CoreCFI VERILOG test routines, including the whole project, can be used directly
8088verilog
- intel8088的verilog core ，完整的RTL-intel 8088 verilog core， all RTL
Q8051
- A 1T51 core which contain 16 verilog files. this mcu core consiste with standard 51
spi
- SPI IP CORE Verilog quartus-SPI IP CORE Verilog quartusii
uart
- uart IP CORE Verilog quartus-uart IP CORE Verilog quartusii
wishbone
- wishbone IP CORE Verilog quartus-wishbone IP CORE Verilog quartusii
DW8051_core
- 8051的内核源码,用verilog HDL写成，已验证功能正确-open core fo 8051 cpu
61EDA_C1910
- ARM9架构简单CORE实现，可以综合，有实现步骤和说明，Verilog代码编写-ARM9 CORE achieve simple structure, can be integrated, with implementation steps and instructions, Verilog coding
fft_2011_3_23(COMPLETE-FFT1024)
- VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
synth_fft
- fftprocessing can complete 256 pointsFFT.-Hardware Descr iption Language(HDL)is an advanced electronic designmethod．After HDL was put into use，it has draw great attention and gained popularity．The design used Verilog HDL and Schematic for entry tools
ARM-Verilog-HDL-IP-CORE
- ARM Verilog HDL IP CORE